One of the remaining challenges is successful Cu metallization of HAR TSVs in via-last processes. To address this, aveni developed a wet process flow composed of a grafted polymer to electrically insulate the TSV, a chemical grafted nickel-based layer for the barrier diffusion layer, and a final electrografted copper filling.
Electrografted P4VP for High-Aspect-Ratio Copper TSV Insulation in Via-Last Process Flow
After years in development, 3D integration technologies, which involve stacking and interconnecting planar die using through silicon via (TSV) technology, have now been commercialized in high-performance applications. To further improve performance, as well as reduce fabrication cost of TSVs, development work to optimize processes that enable high-aspect-ratio (HAR) TSVs is ongoing.
The Institut Interdisciplinaire d’Innovation Technologique (3IT) and Laboratoire d’Électrochimie Interfaciale et Appliquée—both at Université de Sherbrooke, along with the Laboratoire Nanotechnologies Nanosystèmes, recently published a paper describing HAR copper TSVs insulated using aveni’s highly conformal electrografted poly-4-vinylpyridine using a via-last process flow. This enabled the metallization of HAR copper TSVs for die-to-die 3D integration of a 22 x 22 photodiode array tier onto a CMOS control electronics ASIC.